王美玉

师资队伍

  • 王美玉
    性别 : 所属部门 : 微电子工程系
    职称 : 副研究员 学历 : 博士
    行政职务 : 所学专业 :
    办公电话 : 电光学院516
    邮箱 : meiyuwang@nankai.edu.cn
    研究方向 : 集成电路芯片封装、电子封装、微纳连接、第三代半导体等

个人简历

2021.5-至今,南开大学,副研究员

2019.11-2021.5,天津大学和南方科技大学,访问工作

2015.9-2019.11,美国弗吉尼亚理工大学和天津大学,联合培养博士

2008.9-2015.6,天津大学,本科和硕士


研究方向:

[1] 集成电路芯片封装:关键连接材料创新、封装结构设计创新,项目2项在研

[2] 电子封装:电动汽车等方向,面上基金项目在研

[3] 微纳连接:烧结纳米银/铜,国家自然科学基金在研

[4] 第三代半导体:SiC & GaN,面向3D集成先进封装,项目2项在研

[5] 仿真设计及可靠性寿命模型:国家自然科学基金在研



科研项目/成果/获奖/专利


科研项目:

[1] 国家自然科学基金-青年项目:无压低温烧结多尺度银-镍界面互连封装SiC器件的研究,在研,主持。

[2] 省自然科学基金-面上项目:多尺度铜互连封装SiC功率模块的材料、工艺及可靠性研究,在研,主持。

[3] 基础科研项目:芯片3D封装的低应力设计,在研,主持。

[4] 科技部“863计划”项目:第三代半导体器件高密度封装工艺与关键材料,参与,结题

[5] 横向项目:大功率器件温度循环失效仿真分析,在研,主持。

[6] 横向项目:GaN功率器件及应用系统温度和应力仿真分析,在研,主持。

[7] 横向项目:大尺寸集成电路封装散热可靠性研究,结题。

[8] 横向项目:纳米银低温烧结与应力分析技术,结题。


获奖:

[1] “Effect of Substrate Surface Finish on Bonding Strength of Pressure-less Sintered Silver Die-Attach. ICEP IEEE, 2018: 50-54”获Outstanding Technical Paper Award, 2018.

[2] Relationship between Transient Thermal Impedance and Shear Strength of Pressureless Sintered Silver as Die Attachment for Power Devices. ICEP IEEE, 2015: 559-564” ICEP-2015 IEEE CPMT Japan Chapter Young Award, 2015.

[3] 面向高功率密度应用的高温可靠、大容量 SiC 器件关键技术. 中国电工技术学会科学技术奖(技术发明奖)一等奖,2020.

[4] 车用高密度功率模块封装关键技术、材料与应用. 中国电源学会科学技术奖(技术发明奖)一等奖,2019.



论文/专著/教材

近5年发表论文

[1] Pressureless Silver Sintering on Nickel for Power Module Packaging. IEEE Transactions on Power Electronics, 2019.(一区SCI)

[2] Pressureless Sintered-silver Die-attach at 180°C for Power Electronics Packaging. IEEE Transactions on Power Electronics, 2021.(一区SCI)

[3] Pressureless Sintered-silver as die attachment for bonding Si and SiC chips on Silver, Gold, Copper, and Nickel Metallization for Power Electronics Packaging: The Practice and Science. IEEE Journal of Emerging and Selected Topics in Power Electronics, 2022.(一区SCI)

[4] Reliability Improvement of A Double-sided IGBT Module by Lowering Stress Gradient Using Molybdenum Buffers. IEEE Journal of Emerging and Selected Topics in Power Electronics, 2019. (一区SCI)

[5] A Way to Reduce Leakage Current and Improve Reliability of Wire-Bonds for 300-A Multi-Chip SiC Hybrid Modules. IEEE Journal of Emerging and Selected Topics in Power Electronics, 2020.(一区SCI)

[6] Characterization of Multiple Commercial Sintered-silver Pastes as Die-attach for Power Electronics Packaging, IEEE Transactions on Power Electronics, 2023.(一区SCI)

[7] Review on Advanced Packaging Structure for GaN HEMT Module, IEEE Transactions on Power Electronics, 2023.(一区SCI)

[8] Processing, Properties, and Reliability of Si IGBT and SiC MOSFET Power Modules Using Sintered Copper Die-attach, IEEE Transactions on Power Electronics, 2023.(一区SCI)

[9] A Method for Improving the Thermal Shock Fatigue Failure Resistance of IGBT Modules. IEEE Transactions on Power Electronics, 2020. (一区SCI)

[10] Design and Characterizations of A Planar Multi-Chip Half-Bridge Power Module by Pressureless Sintering of Nanosilver Paste. IEEE Journal of Emerging and Selected Topics in Power Electronics, 2019. (一区SCI)

[11] Electrical Method to Measure the Transient Thermal Impedance of Insulated Gate Bipolar Transistor Module. IET Power Electronics, 2015. (JCR Q1)

[12] Efficient Layout Design Automation for Multi-Chip SiC Modules Targeting Small Footprint and Low Parasitic. IET Power Electronics, 2020. (JCR Q1)

[13] How to Determine Surface Roughness of Copper Substrate for Robust Pressureless Sintered Silver in Air. Materials Letters, 2018.(JCR Q1)

[14] Die-attach on Nickel Substrate by Pressureless Sintering A Trimodal Silver Paste. Materials Letters, 2019.(JCR Q1)

[15] Die-attach on Copper by Pressureless Silver Sintering in Formic Acid. ISPSD IEEE, 2019.

[16] Processing and Characterization of Die-attach on Uncoated Copper by Pressure-less Silver Sintering and Low-pressure-assisted Copper Sintering. ICEP IEEE, 2019.

[17] Sintered-copper Die-attach: Processing, Properties, and Reliability. CIPS, 2020.

 [18] Advanced Die-attach by Metal-powder Sintering: The Science and Practice. CIPS, 2018.

[19] An Improved Way to Measure Thermal Impedance of IGBT Module for Power Electronic Packaging. ICEPT, IEEE, 2013.

[20] Ratcheting Behavior of Sintered Copper Joints for Electronic Packaging. IEEE Transactions on Components, Packaging, and Manufacturing Technology, 2021. (JCR Q1)

[21] Design and Experimental Validation of a Wire-bond-less 10 kV SiC MOSFET Power Module. IEEE Journal of Emerging and Selected Topics in Power Electronics, 2020.(一区SCI)

[22] Pressureless Sintering of Nanosilver Paste as Die Attachment on Substrates with ENIG Finish for Semiconductor Applications. Journal of Alloys and Compounds, 2019. (JCR Q1)

[23] 无压烧结银与化学镀镍(磷)和电镀镍基板的界面互连研究. 机械工程学报, 2021. (EI)

[24] 三维系统级封装(3D-SiP)中的硅通孔技术研究进展. 机械工程学报, 2023. (综述)

[25] 无压烧结银-镍互连IGBT电源模块的力、热和电性能. 电源学报, 2020. (核心)

[26] 功率电子封装关键材料和结构设计的研究进展. 电子与封装, 2021. (综述)


社会兼职

[1] IEEE Member,中国电源学会会员,中国电工学会高级会员

[2] IEEE Transactions on Power Electronics审稿人、Journal of Emerging and Selected Topics in Power Electronics审稿人、IEEE Transactions on Vehicular Technology审稿人、Journal of Materials Science: Materials in Electronics审稿人等